View AK6416CH_5990444.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

asahi kasei [ak6416c] das05e-00 2005/03 - 1 - ak6416c 16kbit serial cmos eeprom features advanced cmos eeprom technology read/write non-volatile memory - wide vcc (1.8v to 5.5v) operation - 16384 bits: 1024 16 organization one chip microcomputer interface - interface with one chip microcomputer?s serial communication port directly low power consumption - 0.8 a max. (standby mode) high reliability - endurance : 1000k cycles/address - data retention : 10 years special features - 8 word page write mode - high speed operation ( f max =5mhz: vcc=4.5v to 5.5v ) - automatic write cycle time-o ut with auto-erase(5ms max.) - automatic address increment (read) - ready/ busy status signal - software and hardware controlled write protection ideal for low density data storage - low cost, space saving, 8-pin package (ssop, msop) block diagram data register instruction decode, control and clock generation instruction register eeprom 16384bit 1024 16 di cs sk reset add buffers vref vpp generator vpp sw decoder r/w amps and auto erase 16 16 do rdy/busy
asahi kasei [ak6416c] das05e-00 2005/03 - 2 - general description the ak6416c is a 16384bit, serial, read/write, non-volatile memory device fabricated using an advanced cmos eeprom technology. the ak641 6c has 16384bits of memory organized into 1024 registers of 16 bits each. the ak6416c can operate full function under wide operating voltage range from 1.8v to 5.5v. the charge up circuit is integrated for high voltage generation that is used for write operation. the ak6416c can connect to the serial communication port of popular one chip microcomputer directly (3 line negative clock synchronous interface). at write operation, ak6416c takes in the write data from data input pin (di) to a register synchronously with rising edge of input pulse of serial clock pin ( sk ). and at read operation, ak6416c takes out the read data from a register to data output pin (do) synchronously with falling edge of sk . the ak6416c has 5 instructions such as read, write, page write, wren (write enable) and wrds (write disable). each instruction is organized by op-code block (8bits), address block (8bits) and data (8bits x 2). when input level of sk pin is high level and input level of chip select (cs ) pin is changed from high level to low leve l, ak6416c can receive the instructions. special features of the ak6416c include : au tomatic write time-out with auto-erase, ready/ busy status signal output and ultra-low standby power mode when deselected (cs =high). software and hardware controlled write protection the ak6416c has 2 (hardware and software) write protection functions. after power on or after execution of wrds (wri te disable) instruction, execution of write instruction will be disabled. this write protecti on condition continues until wren instruction is executed or vcc is removed from the part. execution of read instruction is independent of both wren and wrds instructions. reset pin should be low level when write instruction is executed. when the reset pin is high level, the write instruction is not executed. ready/ busy status signal during the automatic write time-out period ( busy status), the ak6416c can't accept the other instructions. the ak6416c has 2 functions to know the busy status from exterior. the rdy/ busy pin indicates the busy status regardless of the cs pin status. the rdy/ busy pin outputs the low level regardless of the cs pin status during busy status. except the above status, this pin outputs high level. also the do pin indicates the busy status. when input level of sk pin is low level and input level of cs pin is changed from high level to low level, the ak6416c is in the status output mode and the do pin indicates the ready/ busy status. the ready/ busy status outputs on do pin until cs pin is changed from low level to high level, or first bit ("1") of op-code of next instruction is given to the part. except when th e device is in the status output mode or outputs data, the do pin is in the high impedance state. type of products model temp.range vcc package ak6416cm -40c to 85c 1.8v to 5.5v 8pin plastic ssop AK6416CH -40c to 85c 1.8v to 5.5v 8pin plastic msop
asahi kasei [ak6416c] das05e-00 2005/03 - 3 - pin arrangement pin function pin name functions cs chip select input sk serial clock input di serial data input do serial data output reset reset input rdy/busy rdy/busy output vcc power supply gnd ground rdy/busy 8 7 6 5 cs s k di do vcc gnd 1 2 3 4 reset ak6416cm 8pin ssop AK6416CH 8pin msop rdy/busy s k cs di do 1 2 3 4 8 7 6 5 gnd reset vcc
asahi kasei [ak6416c] das05e-00 2005/03 - 4 - pin description cs (chip select) when sk is high level and cs is changed from high level to low level, ak6416c can receive the instructions. cs should be kept low level while receiving op-code, address and data and while outputting data. if cs is changed to high level during the above period, ak6416c stops the instruction execution. when sk is low and cs is changed from high level to low level, ak6416c will be in status output mode. the cs need not be low level during the automatic write time-out period ( busy status). sk (serial clock) the sk clock pin is the synchronous clock input for input/output data. at write operation, ak6416c takes in the write data from data input pin (di) synchronously with rising edge of input pulse of serial clock pin ( sk ). and at read operation, ak6416c takes out the read data to data output pin (do) synchronously with falling edge of sk . the sk clock is not needed during the automatic write time-out period ( busy status), the status output period and when the device isn't selected ( cs = high level). di (data input) the op-code, address and write data is input to the di pin. do (data output) the do pin outputs the read data and status signal and will be high impedance except for this timing. rdy/ busy (ready/ busy status) this pin outputs the internal programming status. when the ak6416c is in the automatic write time-out period, this pin outputs the low level ( busy status), and outputs the high level except for this timing. reset (reset) the ak6416c stops executing the write instruction when the r eset pin is high level. the reset pin should be low level while the write instruction input period and the page write instruction input period and the aut omatic write time-out period. if the reset pin is high level while the automatic write time-out period, the ak6416c stops execution of internal programming and the device returns to ready status. in this case the word data of the specified address will be incomplete. when inputting the new instruction after reset, the cs pin should be set to high level. the read, write enable and write disable instructions are not affected by reset pin status. vcc (power supply) gnd (ground)
asahi kasei [ak6416c] das05e-00 2005/03 - 5 - functional description the ak6416c has 5 instructions such as read, write, page write, wren (write enable) and wrds (write disable). each instruction is or ganized by op-code block (8bits), address block (8bits) and data (8bits x 2). when input level of sk pin is high level and input level of chip select ( cs ) pin is changed from high level to low level, ak6416c can receive the instructions. when the instructions are executed consecutively, the cs pin should be brought to high level for a minimum of 250ns(tcs) between consecutive instruction cycle. instruction set for ak6416c instruction op-code address data write 1 0 1 0 0 1 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 d15 ? d0 page write 1 0 1 1 0 1 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 d15 ? d0 read 1 0 1 0 1 0 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 d15 ? d0 wren 1 0 1 0 0 0 1 1 x x x x x x x x wrds 1 0 1 0 0 0 0 0 x x x x x x x x (wral) 1 0 1 0 1 1 1 1 x x x x x x x x d15 ? d0 x: don't care (note) the wral instruction is used for factory function test only. user can't use this instruction. write the write instruction is followed by 16 bits of dat a to be written into the specified address. after the 32nd rising edge of sk to read d0 in, the ak6416c will be put into the automatic write time-out period. during the automatic write time-out period ( busy status) and while entering write instruction, th e reset pin should be low level. if th e reset pin is set to high level during the automatic write time-out period, the ak6416c stops execution of internal programming and the device returns to ready status. in this case the word data of the specified address will be incomplete. when inputting the new instruction after reset, the cs pin should be set to high level. when the reset pin is kept at high level, the write is not executed. this becomes write protection function. the cs pin need not be high level during automatic write time-out period ( busy status). write sk cs bus y 1 1 reset hi-z di do rdy/ te/w 2 3 4 5 6 7 8 9 10 15 16 17 18 30 31 32 0 1 0 0 1 a9 a8 a7 a6 a1 a0 d15 d14 d2 d1 d0
asahi kasei [ak6416c] das05e-00 2005/03 - 6 - page write ak6416c has page write mode, which can write the data within 8 words with one programming cycle. the input data sent to the shift register within 8 words. after the instruction input, the internal programming cycle starts when cs pin changes low to high. after the instructions are inputted, cs pin should change low to high after the last data bit (d0) inputs and before next sck clock rises. page write function can start only at this timing. after the receipt of each word, the three lower order address pointer bits internally incremented by one. the higher order seven bits of the word address remains constant. when the highest address is reached ?xx xxxx x111 ?, the address counter rolls ov er to address ?xx xxxx x000? allowing the page write cycle to be continued indefinitely. if ak6416c is transmitted more than 8 words, the address counter will ?roll over? and the previously written data will be overwritten. when ak6416c is transmitted 10 words, ninth word will be overwritten to first word, and tenth word will be overwritten to second word. during the automatic write time-out period ( busy status) and while entering page write instruction, the reset pin should be low level. if the reset pin is set to high level during the automatic write time-out period, the ak6416c stops execution of internal programming and the device returns to ready status. in this case the word data of the specified address will be incomplete. when inputting the new instruction after reset, the cs pin should be set to high level. when the reset pin is kept at high level, the page write is not executed. this becomes write protection function. the cs pin need not be high level during automatic write time-out period ( busy status). page write d2 d1 d0 d15 d14 d15 d0 hi-z d15 d14 d2 d1 d0 d2 d1 d0 30 31 32 10 15 16 17 18 33 34 46 47 48 hi-z a1 a0 d15 d14 a9 a8 a7 a6 1 0 1 1 0 1 data(n) sk cs reset bus y di do rdy/ sk cs reset bus y di do rdy/ 1 2 3 4 5 6 7 8 9 data(n+1) data(n+7) te/w
asahi kasei [ak6416c] das05e-00 2005/03 - 7 - read the read instruction is the only instruction which outputs serial data on the do pin. when the 17th falling edge of sk is received , the do pin will come out of high impedance state and shift out the data from d15 first in descending order which is located at the address specified in the instruction. the data in the next address can be read sequentia lly by continuing to provide clock. the address automatically cycles to the next higher ad dress after the 16bit data shifted out. when the highest address is reached (a9-a0 : 11 1111 1111), the address counter rolls over to address (a9-a0 : 00 0000 0000) allowing the read cycle to be continued indefinitely. read wren / wrds ( write enable and write disable ) when vcc is applied to the part, it powers up in the programming disable (wrds) state. programming must be preceded by a programming enable (wren) instruction. programming remains enabled until a programming disable (wrds) instruction is executed or vcc is removed from the part. the programming disable instruction is provided to protect against accidental data disturb. execution of a read instruction is not affected by both wren and wrds instructions. wren / wrds hi-z 48 32 33 34 15 16 17 18 sk cs bus y di do rdy/ * "h" * the data in the next address can be read sequentiall y by continuing to provide clock. 1 1 2 3 4 5 6 7 8 9 10 0 1 0 1 0 a9 a8 a7 a6 a1 a0 d15 d14 d0 d15 d14 d0 hi-z sk cs di do wren=11 sk pulses exceeding 17 are ignored. 1 1 2345678910 15161718 01000 14 13 12 11 x x xxxxxx wrds=00
asahi kasei [ak6416c] das05e-00 2005/03 - 8 - absolute maximum ratings parameter symbol min. max. unit power supply vcc -0.6 +6.5 v all input voltages with respect to ground vio -0.6 vcc+0.6 v ambient storage temperature tst -65 +150 c stress above those listed under "absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specific ation is not implied. exposure to absolute maximum conditions for extended periods may affect device reliability. recommended operat ing condition parameter symbol min. max. unit power supply vcc 1.8 5.5 v ambient operating temperature ta -40 +85 c
asahi kasei [ak6416c] das05e-00 2005/03 - 9 - electrical characteristics (1) d.c. electrical characteristics ( 1.8v vcc 5.5v, -40c ta 85c, unless otherwise specified ) parameter symbol condition min. max. unit current dissipation icc1 v cc=5.5v,tskp=200ns *1 2.5 ma (write) icc2 vcc=2.5v,tskp=400ns *1 2.0 ma icc3 vcc=1.8v,tskp=1.0 s *1 1.5 ma current dissipation icc4 v cc=5.5v,tskp=200ns *1 1.0 ma (read,wren, icc5 vcc=2.5v,tskp=400ns *1 0.2 ma wrds) icc6 vcc=1.8v,tskp=1.0 s *1 0.1 ma current dissipation (standby) iccs vcc=5.5v *2 0.8 a input high voltage vih1 2.5v vcc 5.5v 0.7 vcc vcc+0.5 v vih2 1.8v vcc < 2.5v 0.8 vcc vcc+0.5 v input low voltage vil1 2.5v vcc 5.5v 0 0.3 vcc v vil2 1.8v vcc < 2.5v 0 0.2 vcc v output high voltage voh1 2.5v vcc 5.5v ioh=-50 a vcc-0.3 v voh2 1.8v vcc < 2.5v ioh=-50 a vcc-0.3 v output low voltage vol1 2.5v vcc 5.5v iol=1.0ma 0.4 v vol2 1.8v vcc < 2.5v iol=0.1ma 0.4 v input leakage cs ,sk ,di,reset ili vcc=5.5v, vin=5.5v 1.0 a output leakage ilo vcc=5.5v vout=5.5v, cs=vcc 1.0 a *1 : vin=vih/vil, do=rdy/ busy =open *2 : cs =vcc, sk /di/reset=vcc/gnd, do= rdy/ busy =open
asahi kasei [ak6416c] das05e-00 2005/03 - 10 - (2) a.c. electrical characteristics ( 1.8v vcc 5.5v, -40c ta 85c, unless otherwise specified ) parameter symbol condition min. max. unit sk cycle time tskp1 4.5v vcc 5.5v 200 ns tskp2 2.5v vcc < 4.5v 400 ns tskp3 1.8v vcc < 2.5v 1.0 s sk pulse width tskw1 4.5v vcc 5.5v 100 ns tskw2 2.5v vcc < 4.5v 200 ns tskw3 1.8v vcc < 2.5v 500 ns cs setup time tcss1 4.5v vcc 5.5v 40 ns tcss2 1.8v vcc < 4.5v 80 ns cs hold time tcsh1 4.5v vcc 5.5v 40 ns tcsh2 1.8v vcc < 4.5v 80 ns sk setup time tsksh/l1 4.5v vcc 5.5v 40 ns tsksh/l2 1.8v vcc < 4.5v 80 ns reset setup time tress 0 ns reset hold time tresh 0 ns data setup time tdis1 4.5v vcc 5.5v 40 ns tdis2 2.5v vcc < 4.5v 80 ns tdis3 1.8v vcc < 2.5v 200 ns data hold time tdih1 4.5v vcc 5.5v 40 ns tdih2 2.5v vcc < 4.5v 80 ns tdih3 1.8v vcc < 2.5v 200 ns tpd1 4.5v vcc 5.5v *3 60 ns do pin output delay tpd2 2.5v vcc < 4.5v *3 150 ns tpd3 1.8v vcc < 2.5v *3 300 ns rdy/busy pin output delay tpd cl=100pf 1 s selftimed programming time te/w 5 ms write recovery time trc 100 ns min cs high time tcs 250 ns do high-z time toz 500 ns endurance *4 5.5v, 25 c, page write 1,000,000 e/w cycles / address *3 : cl=100pf *4 : these parameters are not 100% tested. these are the sample value.
asahi kasei [ak6416c] das05e-00 2005/03 - 11 - synchronous data timing instruction input data output (read) hi-z sk cs di do rdy/ bus y 15 tskw tskw tskp tdis tdih a1 16 17 18 a0 d15 d14 "l" "h" "l" "h" tpd tpd tdis tdih tsksh sk cs reset tress tcs tcss 1 trc tskw tskw tskp 2 3 1 01 hi-z di do rdy/ bus y
asahi kasei [ak6416c] das05e-00 2005/03 - 12 - data output (read) write ready / busy signal output (rdy/ busy pin) hi-z sk cs reset 30 tpd te/w 32 di do rdy/ bus y 31 d2 d1 d0 tcsh tresh sk cs di do rdy/ bus y 32 d0 "l" "h" toz 31 d1
asahi kasei [ak6416c] das05e-00 2005/03 - 13 - page write ready / busy signal output (rdy/ busy pin) ready/ busy signal output (do pin) rdy/ busy sk cs di do to z busy tcs tsksl tpd read y busy read y hi-z sk cs reset tpd te/w di do rdy/ bus y d1 d0 tcsh tresh tskh
important notice these products and their specificati ons are subject to change without notic e. before considering any use or application, consult the asahi kasei microsystems co., ltd. (akm) sales office or authorized distributor concerning their current status. akm assumes no liability for infringement of any pa tent, intellectual property, or other right in the application or use of any information contained herein. any export of these products, or devices or system s containing them, may requi re an export license or other official approval under the la w and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. akm products are neither intended nor authorized for use as critical co mponents in any safety, life support, or other hazard related device or system, and akm assumes no responsibility relating to any such use, except with the express written consent of t he representative director of akm. as used here: (a) a hazard related device or sy stem is one designed or intended fo r life support and maintenance of safety or for applications in medicine, aerospace, nuc lear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of t he safety or effectiveness of the device or system containing it, and which must t herefore meet very high standards of performance and reliability. it is the responsibility of the buyer or distributor of an akm product who distributes, disposes of, or otherwise places the product with a third party to notify that part in adv ance of the above content and conditions, and the buyer or distribut or agrees to assume any and all responsibility and reliability for and hold akm harmless from any and all claims arising fr om the use of said product in the absence of such notification.

▲Up To Search▲

Price & Availability of AK6416CH

	To Download AK6416CH Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .